Prior to this release, most M.2 implementations were based on the M.2 v1.0 specification (released around 2013-2016), which was retrofitted to support PCIe 3.0 and later 4.0.

If you downloaded the PDF before March 15, 2025, please check for these errata or obtain the revision 1.0 "updated" copy.

PCI Express M.2 Specification Revision 5.0, Version 1.0 Release Date: May 2021 Publishing Body: PCI-SIG (Peripheral Component Interconnect Special Interest Group)

to handle higher power demands for performance-oriented modules. Voltage Support : Added support for 0.75 V core voltage in the PWR_3 rail specifically for LGA Enhancements : Introduced support for for Land Grid Array (LGA) modules. Errata Corrections : Incorporated critical fixes from the November 30, 2022, errata table (v0.7) and the August 17, 2022, errata Hold Time Reductions : Included reductions for asserted hold time to optimize power state transitions. Specification Structure

~16 GB/s over the same x4 M.2 slot configuration.

Because the PCI-SIG is a member-driven consortium, official specification PDFs are tightly controlled to ensure intellectual property protection and engineering accuracy.

The M.2 (Next Generation Form Factor, or NGFF) standard has come a long way. It was designed as a compact, versatile replacement for older standards like mSATA and Mini PCIe. Over the years, the spec has evolved to keep pace with the ever-increasing demands for data throughput:

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